x SEED 2022 Program

SEED 2022

September 26 - September 27, 2022

 Held Virtually


* SEED 2022 is a virtual program that will host technical paper sessions and keynotes live. The paper presentation times are kept short in light of the virtual nature of the program.

* All times are in EDT (UTC-4).

* All registered participants receive Zoom links to join the technical sessions via email from registration chair, Bingzhe Li <bingzhe.li@okstate.edu>.

Monday, September 26, 2022
9:30 - 9:45 am EDT Welcome
9:45 - 10:45 am EDT Session 1: Caches
Session Chair: Weidong Shi (University of Houston)
10:50 - 11:50 am EDT Keynote 1: Todd Austin (University of Michigan / Agita Labs, Inc.)
Session Chair: Yuval Yarom (University of Adelaide)
11:55 - 12:45 pm EDT Session 2: Crypto & ML
Session Chair: David Kaeli (Northeastern University)
Tuesday, September 27, 2022
9:30 - 10:20 am EDT Session 3: Secure Environments
Session Chair: Todd Austin (University of Michigan / Agita Labs, Inc.)
10:25 - 11:25 am EDT Keynote 2: Mengjia Yan (MIT)                                                             
Session Chair: Hsien-Hsin Sean Lee (Intel)
11:30 - 12:20 pm EDT Session 4: Architecture
Session Chair:
Amro Awad (North Carolina State University)

Detailed Program

Monday, September 26, 2022
9:30 - 9:45 am EDT Welcome
9:45 - 10:45 am EDT
Session 1: Caches
Weidong Shi (University of Houston)
Avenger: Punishing the Cross-Core Last-Level Cache Attacker and Not the Victim by Isolating the Attacker
Yashika Verma (IIT Kanpur) Biswabandan Panda (IIT Bombay)
Chameleon Cache: Approximating Fully Associative Caches with Random Replacement to Prevent Contention-Based Cache Attacks
Thomas Unterluggauer (Intel Corporation), Austin Harris (The University of Texas at Austin), Scott Constable (Intel Corporation), Fangfei Liu (Intel Corporation), Carlos Rozas (Intel Corporation)
PREDATOR: A Cache Side-Channel Attack Detector Based on Precise Event Monitoring·
Minjun Wu (University of Minnesota at Twin Cities), Stephen McCamant (University of Minnesota), Pen-Chung Yew (University of Minnesota at Twin Cities), Antonia Zhai (University of Minnesota)
These Aren't The Caches You're Looking For: Stochastic Channels on Randomized Caches·
Tarunesh Verma (University of Michigan), Achilleas Anastasopoulos (University of Michigan), Todd Austin (University of Michigan)
Data-Out Instruction-In (DOIN!): Leveraging Inclusive Caches To Attack Speculative Delay Schemes Paper Type: Regular·
Pavlos Aimoniotis (Uppsala University), Amund Bergland Kvalsvik (Norwegian University of Science and Technology), Magnus Själander (Norwegian University of Science and Technology), Stefanos Kaxiras (Uppsala University)
10:45 - 11:45 am EDT
Keynote 1: From Security to Privacy… -- Prof. Todd Austin , University of Michigan / Agita Labs, Inc.
Yuval Yarom (University of Adelaide)
For the last five years, I have been slowly inching my research group (and more recently my startup) from the field of security to privacy. These two research areas share a lot of DNA, but they are definitely distinct species. The privacy technology field is an exciting research arena with significant promise to ease the tension between data privacy and data discovery. In this presentation, I will share my journey toward privacy technology research, with focus on the changing goals, technologies, and applications. Hardware security technologies are perfectly positioned to address the challenges in this field in ways that are more performant, capable and expressive than any competing non-hardware technologies. Moreover, hardware-based privacy technologies could potentially one day subsume today's security defenses, providing future security defenses that are cryptographic in strength and vulnerability agnostic.
Todd Austin is a Professor of Electrical Engineering and Computer Science at the University of Michigan in Ann Arbor. His research interests include computer architecture, robust and secure system design, hardware and software verification, and performance analysis tools and techniques. From 2012-2017, Todd was the director of C-FAR, the Center for Future Architectures Research, a multi-university SRC/DARPA funded center that was seeking technologies to scale the performance and efficiency of future computing systems. Prior to joining academia, Todd was a Senior Computer Architect in Intel's Microcomputer Research Labs, a product-oriented research laboratory in Hillsboro, Oregon. Todd is the first to take credit (but the last to accept blame) for creating the SimpleScalar Tool Set, a popular collection of computer architecture performance analysis tools. Todd is co-author (with Andrew Tanenbaum of Vrije Universiteit) of the undergraduate computer architecture textbook, "Structured Computer Architecture, 6th Ed." In addition to his work in academia, Todd is founder of SimpleScalar LLC, and co-founder of Agita Labs Inc. and InTempo Design LLC. In 2002, Todd was a Sloan Research Fellow, and in 2007 he received the ACM Maurice Wilkes Award for "innovative contributions in Computer Architecture including the SimpleScalar Toolkit and the DIVA and Razor architectures." Todd is an IEEE Fellow, and he received his PhD in Computer Science from the University of Wisconsin in 1996.
11:55 - 12:45 pm EDT
Session 2: Crypto & ML 
David Kaeli (Northeastern University)
Accelerating Polynomial Multiplication for Homomorphic Encryption on GPUs
Kaustubh Shivdikar (Northeastern University), Gilbert Jonatan (KAIST University), Evelio Mora (Universidad Católica de Murcia), Neal Livesay (Northeastern University), Rashmi Agrawal (Boston University), Ajay Joshi (Boston University), José L. Abellán (Universidad Católica de Murcia), John Kim (KAIST University), David Kaeli (Northeastern University)
Sequestered Encryption: A Hardware Technique for Comprehensive Data Privacy·
Lauren Biernacki (University of Michigan), Meron Zerihun Demissie (University of Michigan), Kidus Birkayehu Workneh (University of Colorado Boulder), Fitsum Assamnew Andargie (Addis Ababa Institute of Technology, Addis Ababa University), Todd Austin (University of Michigan)
Establishing Cooperative Computation with Hardware Embassies
Alvin Oliver Glova (UC Santa Barbara), Yukai Yang (University of Pennsylvania), Yiyao Wan (UC San Diego), Zhizhou Zhang (UC Santa Barbara), George Michelogiannakis (Lawrence Berkeley National Labs), Jonathan Balkind (UC Santa Barbara), Timothy Sherwood (UC Santa Barbara)
Foreseer: Efficiently Forecasting Malware Event Series with Long Short-Term Memory
Kailash Gogineni (George Washington University), Preet Derasari (George Washington University), Guru Venkataramani (George Washington University)
Tuesday, September 27, 2022
9:30 - 10:20 am EDT
Session 3: Secure Environments 
Todd Austin (University of Michigan / Agita Labs, Inc.)
Confidential Quartet: Comparison of Platforms for Virtualization-Based Confidential Computing
Roberto Guanciale (Royal Institute of Technology (KTH)), Nicolae Paladi (CanaryBit and Lund University), Arash Vahidi (Research Institutes of Sweden (RISE))
SoK: Limitations of Confidential Computing via TEEs for High-Performance Compute Systems
Ayaz Akram (University of California, Davis), Venkatesh Akella (University of California, Davis), Sean Peisert (Lawrence Berkeley National Lab), Jason Lowe-Power (University of California, Davis)
PAGODA: Towards Binary Code Privacy Protection with SGX-based Execute-Only Memory·
Jiyong Yu (University of Illinois at Urbana-Champaign), Xinyang Ge (Microsoft Research), Christopher Fletcher (University of Illinois--Urbana Champaign) , Trent Jaeger (Penn State University), Weidong Cui (Microsoft Research)
Enclyzer: Automated Analysis of Transient Data Leaks for Intel SGX
Jiuqin Zhou (Southern University of Science and Technology), Yuan Xiao (Intel), Radu Teodorescu (The Ohio State University), Yinqian Zhang (Southern University of Science and Technology)
10:25 - 11:25 am EDT
Keynote 2: Looking Beyond Microarchitectural-Only Side Channels -- Prof. Mengjia Yan , MIT
Hsien-Hsin Sean Lee (Intel)
Modern systems are becoming increasingly complex, exposing a large attack surface with vulnerabilities in both software and hardware. Today, it is common for security researchers to explore software and hardware vulnerabilities separately, considering these vulnerabilities in disjoint threat models. In this talk, I will discuss the importance of considering a broader threat model when studying microarchitectural side channels and looking beyond microarchitecture-only side channels. A broader threat model considers the combined effects of exploiting vulnerabilities residing in different system layers. I will use a few examples to demonstrate how a broader threat model can help advance our hardware security research in multiple ways.
Mengjia Yan is an Assistant Professor in the EECS department at MIT. She received her Ph.D. degree from the University of Illinois at Urbana-Champaign (UIUC). Her research interest lies in the areas of computer architecture and hardware security, with a focus on microarchitectural attacks and defenses. Mengjia received the NSF CAREER Award, ACM SIGARCH/IEEE CS TCCA Outstanding Dissertation Award Honorable Mention, multiple MICRO TopPicks in Computer Architecture and a MICRO best paper award.
11:30 - 12:20 pm EDT
Session 4: Architecture 
Amro Awad (North Carolina State University)
Improving the Security and Programmability of Persistent Memory Objects
Derrick Greenspan (University of Central Florida College of Engineering and Computer Science), Naveed Mustafa (University of Central Florida College of Engineering and Computer Science), Zoran Kolega (University of Central Florida College of Engineering and Computer Science), Mark Heinrich (University of Central Florida College of Engineering and Computer Science), Yan Solihin (University of Central Florida College of Engineering and Computer Science)
A Compiler for Transparent Namespace-Based Access Control for the Zeno Architecture
Jacob Abraham (Arizona State University), Alan Ehret (Arizona State University), Michel Kinsy (Arizona State University)
Eliminating Micro-architectural Side-Channel Attacks using Near Memory Processing
Casey Nelson (Brown University), Joseph Izraelevitz (University of Colorado, Boulder), R. Iris Bahar (Colorado School of Mines, Brown University), Tamara Lehman (University of Colorado Boulder)
Protecting On-Chip Data Access Against Timing-Based Side-Channel Attacks on Multicores
Usman Ali (University of Connecticut), Abdul Rasheed Sahni (University of Connecticut), Omer Khan (University of Connecticut)

Sponsored by: